Epson S1R72105 Technical Manual page 18

S1R72105 Technical Manual
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Details appearing in USBWindow_0(18h) to USBWindow_0(1Fh)
USBIndex(17h) Register name
00h USBWindow_0(18h)
USBWindow_1(19h)
USBWindow_2(1Ah)
USBWindow_3(1Bh)
USBWindow_4(1Ch)
USBWindow_5(1Dh)
USBWindow_6(1Eh)
USBWindow_7(1Fh)
01h to 03h USBWindow_0(18h)
USBWindow_1(19h)
USBWindow_2(1Ah)
USBWindow_3(1Bh)
USBWindow_4(1Ch)
USBWindow_5(1Dh)
USBWindow_6(1Eh)
USBWindow_7(1Fh)
08h USBWindow_0(18h)
USBWindow_1(19h)
USBWindow_2(1Ah)
USBWindow_3(1Bh)
USBWindow_4(1Ch)
USBWindow_5(1Dh)
USBWindow_6(1Eh)
USBWindow_7(1Fh)
09h USBWindow_0(18h)
USBWindow_1(19h)
USBWindow_2(1Ah)
USBWindow_3(1Bh)
USBWindow_4(1Ch)
USBWindow_5(1Dh)
USBWindow_6(1Eh)
USBWindow_7(1Fh)
12
Description on display
USBAddress: USB address
EP0Config_1：EP0 configuration
EP0InControl: EP0 IN Transaction control
EP0OutControl: EP0 OUT Transaction control
(Reserved)
EP0FIFOremain: EP0 FIFO counter
EP0FIFOforCPU: EP0 FIFO for CPU access
EP0FIFOCtrl: EP0 FIFO control
EPrConfig_0:EP{r}(r=a,b,c) configuration
EPrConfig_1:EP{r}(r=a,b,c) configuration
EPrControl：EP {r} (r=a,b,c) Transaction control
(Reserved)
(Reserved)
EPrFIFOremain：EP {r} (r=a,b,c) FIFO counter
EPrFIFOforCPU：EP {r} (r=a,b,c) FIFO for CPU access
EPrFIFOCtrl： EP {r} (r=a,b,c) FIFO control
EP0_SETUP_0： EP0 SETUP stage receive data
EP0_SETUP_1： EP0 SETUP stage receive data
EP0_SETUP_2： EP0 SETUP stage receive data
EP0_SETUP_3： EP0 SETUP stage receive data
EP0_SETUP_4： EP0 SETUP stage receive data
EP0_SETUP_5： EP0 SETUP stage receive data
EP0_SETUP_6： EP0 SETUP stage receive data
EP0_SETUP_7： EP0 SETUP stage receive data
FrameNumber_H: Higher order 3 bits in the FrameNumber field of the
SOF Packet received
FrameNumber_L: Lower order 8 bits in the FrameNumber field of the
SOF Packet received
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
(Reserved)
EPSON Rev.1.0