Cpu Interface; Register Read Timing - Epson S1R72105 Technical Manual

S1R72105 Technical Manual

8.4.1 CPU Interface

8.4.1.1 Register Read Timing

XCS
AD[4:0]
DB[7:0]
XRD
Symbol
XCS fall → XRD fall
T
101
AD [4:0] Valid→ XRD fall
XRD rise → AD [4:0] Invalid
T
102
XRD rise → XCS rise
T XRD LOW level pulse width
103
T XRD HIGH level pulse width
104
XRD fall→
T
105
DB[7:0] output
XRD rise → DB[7:0] hold
T
106
*1: The FIFO area for USB indicates acess to USBWindow_6(1Eh) in case of USBIndex(17h) = 00h to 03h.
66
T
101
T
105
Item
Normal (Registers other
than those below)
FIFO area for USB *1
T
103
Min.
0
0
65
45
2
2
EPSON
T
102
T
106
T
104
Typ. Max.
- -
- -
- -
- -
65
-
120
- 15
Unit
ns
ns
ns
ns
ns
ns
Rev.1.0