Table of Contents
Advertisement
Pin No.
Symbol
CPU interface-related matters (19)
19
AD0
20
AD1
21
AD2
22
AD3
23
AD4
24
AD5
10
DB0
11
DB1
12
DB2
13
DB3
15
DB4
16
DB5
17
DB6
18
DB7
31
XCS
30
XINTU
29
XINTS
28
XRD
27
XWR
Others (17)
59
OSCIN
60
OSCOUT
8
TESTMON
32
XRESET
9
TESTEN
63
CLKSEL
62
EXCLK
64
V
C
HV
:5V (5)
DD
14,33,44,51,
HV
DD
67,77,82,86,
90,94,98
LV
:3.3V (6)
DD
1,26,61,76
LV
DD
V
:0V (17)
SS
4,25,38,50,
V
SS
58,65,69,72,
75,79,84,88,
92,96,100
(Note)
I
Is
Ipu
Ispu
Rev.1.0
I/O
I
Address input pin (AD0 to AD5)
I/O
Data pin (DB0 to DB7)
Is
Chip select signal for accessing internal register
O
USB interrupt request output signal
O
SCSI interrupt request output signal
Is
Data read signal
Is
Data write signal
I
Input to built-in oscillation circuit (40MHz or 20MHz)
O
Output from built-in oscillation circuit
O
Monitor output for testing (open LOW output usually)
Ispu
System reset input signal
Ipd
Pin for testing (connected to LOW (GND) usually)
I
Input clock and PLL operation selection
HIGH (LV
): Generates clock (SCSI_40MHz,USB_48MHz)
DD
LOW (GND): PLL stop (power-down) , external clock in
operation
40MHz oscillation in OSCIN/OUT or input
40MHz(3.3V) to OSCIN
Input 48MHz(3.3V) to EXCLK
I
External clock input pin for 3.3V level USB
(Connected to LOW (GND) or HIGH (LV
used).
O
For instructions as to how to connect internal VCO control
pins, refer to the description of PLL circuit.
P
Power supply for 5V interface
P
Power supply for internal operation
P
GND
: Input
: Schmitt input
: Pull-up input
: Pull-up Schmitt input
Functional description
in internal PLL.
20MHz oscillation in OSCIN/OUT or input
20MHz(3.3V) to OSCIN
EXCLK is connected to LOW (GND) or HIGH
(LV
).
DD
O
: Output
Ood
: Open-drain output
Otr
: Try state output
Ipd
: Pull-down input
EPSON
S1R72105 Technical Manual
Drive capability 3mA
Drive capability 6mA
Drive capability 6mA
Drive capability 2mA
) while it is not
DD
Remarks
5
Advertisement
Table of Contents
