the quantity per I/O bank. Device performance at full utilization is equivalent across all
devices when using these recommended networks.
Table 3-1
and
Table 3-2
GTP transceiver power supplies. For this information, refer to UG476, 7 Series FPGAs
GTX/GTH Transceivers User Guide and UG482, 7 Series FPGAs GTP Transceivers User Guide.
RECOMMENDED:
checklist for schematic review which complements this document.
Required PCB Capacitor Quantities
Table 3-1
lists the PCB decoupling capacitor guidelines per V
SoC devices.
Table 3-1: Required PCB Capacitor Quantities per Device (PL)
Package
Device
680
330
µF
µF
CLG225
Z-7010
0
0
CLG400
Z-7010
0
0
CLG485
Z-7015
0
1
CLG400
Z-7020
0
1
CLG484
Z-7020
0
1
SBG485
Z-7030
0
1
FBG484/
Z-7030
0
1
RB484
FBG676
Z-7030
0
1
FFG676/
Z-7030
0
1
RF676
FBG676
Z-7035
2
0
FFG676/
Z-7035
2
0
RF676
FFG900/
Z-7035
2
0
RF900
FBG676
Z-7045
2
0
FFG676/
Z-7045
2
0
RF676
FFG900/
2
0
Z-7045
RF900
FFG900
Z-7100
3
0
Zynq-7000 PCB Design Guide
UG933 (v1.8) November 7, 2014
do not provide the decoupling networks required for the GTX and
Refer to XMP277, 7 Series Schematic Review Recommendations, for a comprehensive
V
V
CCINT
CCBRAM
100
4.7
0.47
100
47
4.7
µF
µF
µF
µF
µF
µF
1
1
2
NA
NA
NA
1
1
2
0
1
1
0
2
4
1
0
1
0
2
4
1
0
1
0
2
4
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
2
1
0
2
4
0
2
1
0
2
4
0
1
1
0
2
4
0
2
0
1
0
2
0
2
0
1
0
2
0
1
0
1
0
2
0
2
0
2
0
4
www.xilinx.com
Chapter 3: Power Distribution System
supply rail for Zynq-7000 AP
CC
V
V
CCAUX
CCAUX_IO
0.47
47
4.7
0.47
47
4.7
µF
µF
µF
µF
µF
µF
NA
1
1
1
NA
NA
1
1
1
1
NA
NA
1
1
1
2
NA
NA
1
1
1
1
NA
NA
1
1
1
2
NA
NA
2
1
0
0
NA
NA
2
1
0
0
NA
NA
2
1
0
0
1
2
1
0
0
1
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
4
1
0
0
1
4
1
0
0
1
4
1
0
0
1
8
1
0
0
1
(3)(4)
V
per Bank
CCO
47 µF
0.47
4.7
0.47
or
µF
µF
µF
100 µF
NA
1
2
4
NA
1
2
4
NA
1
2
4
NA
1
2
4
NA
1
2
4
NA
1
0
0
NA
1
0
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
1
0
1
0
0
1
0
1
0
0
1
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
Send Feedback
Bank 0
47
µF
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
13
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