Pcb Decoupling Capacitors; Recommended Pcb Capacitors Per Device; Chapter 3: Power Distribution System; Introduction - Xilinx Zynq-7000 Design Manual

Power Distribution System

Introduction

This chapter documents the power distribution system (PDS) for Zynq-7000 AP SoC devices,
including decoupling capacitor selection, placement, and PCB geometries. A simple
decoupling method is provided for each device. Basic PDS design principles are covered, as
well as simulation and analysis methods. This chapter contains the following sections:
•

PCB Decoupling Capacitors

• Basic PDS Principles
• Simulation Methods
• PDS Measurements
• Troubleshooting
PCB Decoupling Capacitors

Recommended PCB Capacitors per Device

A simple PCB-decoupling network for the Zynq-7000 AP SoC devices is listed in
and Table 3-2. The optimized quantities of PCB decoupling capacitors assumes that the
voltage regulators have stable output voltages and meet the regulator manufacturer's
minimum output capacitance requirement.
Decoupling methods other than those presented in these tables can be used, but the
decoupling network should be designed to meet or exceed the performance of the simple
decoupling networks presented here. The impedance of the alternate network must be less
than or equal to that of the recommended network across frequencies from 100 KHz to
100 MHz.
Because device capacitance requirements vary with CLB and I/O utilization, PCB decoupling
guidelines are provided on a per-device basis. V
supply capacitors are listed as the quantity per device, while V
Zynq-7000 PCB Design Guide
UG933 (v1.8) November 7, 2014
, V
CCINT CCAUX
www.xilinx.com
Chapter 3
Table 3-1
, V , V , and PS
CCAUX_IO CCBRAM
capacitors are listed as
CCO
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