Interrupt Vectors - Epson S1C6S3N2 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)

Interrupt vectors

Table 4.13.3
Interrupt request and
interrupt vectors
I-92
When an interrupt request is input to the CPU, the CPU
begins interrupt processing. After the program being exe-
cuted is terminated, the interrupt processing is executed in
the following order.
The address data (value of program counter) of the pro-
gram to be executed next is saved in the stack area (RAM).
The interrupt request causes the value of the interrupt
vector (page 1, 01H–0FH) to be set in the program counter.
The program at the specified address is executed (execu-
tion of interrupt processing routine by software).
Table 4.13.3 shows the correspondence of interrupt re-
quests and interrupt vectors.
The processing in
Note
system clock.
PC Value
PCS3
PCS2
PCS1
PCS0
The four low-order bits of the program counter are indirectly
addressed through the interrupt request.
and above take 12 cycles of the CPU
Interrupt Request
1 Stopwatch interrupt
0
1 Timer interrupt
0
1 Input (K00–K03) interrupt
0
1 Input (K10) interrupt or
0
EPSON
Enabled
Masked
Enabled
Masked
Enabled
Masked
Enabled
Masked
S1C6S3N2 TECHNICAL HARDWARE