Programming Note - Epson S1C6S3N2 Technical Manual

CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Event Counter)
EVRST:
Event counter reset
(0FCH·D0)
EVRUN:
Event counter RUN/STOP
(0FCH·D2)

Programming note

I-76
This is the register for resetting event counter.
When "1" is written :
When "0" is written :
Read-out :
When "1" is written, event counter is reset and the data
becomes "00H". When "0" is written, no operation is exe-
cuted.
This is a write-only bit, and is always "0" at read-out.
This register controls the event counter RUN/STOP status.
When "1" is written :
When "0" is written :
Read-out :
When "1" is written, the event counter enters the RUN
status and starts receiving the clock signal input.
When "0" is written, the event counter enters the STOP
status and the clock signal input is ignored. (However,
input to the input port is valid.)
At initial reset, this register is set to "0".
To prevent erroneous reading of the event counter data, read
out the counter data several times, compare it, and use the
matching data as the result.
EPSON
Event counter reset
No operation
Always "0"
RUN
STOP
Valid
S1C6S3N2 TECHNICAL HARDWARE