Programming Notes - Epson S1C6S3N2 Technical Manual

Cmos 4-bit single chip microcomputer
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CHAPTER 5: PERIPHERAL CIRCUITS (Input Ports)

Programming notes

Fig. 5.7.3
Input interrupt timing
II-80
(1) When input ports are changed from high to low by pull-
down resistor, the fall of the waveform is delayed on
account of the time constant of the pull-down resistance
and input gate capacitance. Hence, when fetching input
ports, set an appropriate wait time.
Particular care needs to be taken of the key scan during
key matrix configuration. Aim for a wait time of about 1
ms.
(2) When "noise rejector circuit enable" is selected with the
mask option, a maximum delay of 1 ms occurs from the
time the interrupt conditions are established until the
interrupt factor flag (IK) is set to "1" (until the interrupt is
actually generated).
Hence, pay attention to the timing when reading out
(resetting) the interrupt factor flag.
(3) Input interrupt programing related precautions
Port K input
Differential register
Falling edge interrupt
Mask register
When the content of the mask register is rewritten, while the port
K input is in the active status. The input interrupt factor flags are
set at
and
the interrupt due to the rising edge.
When using an input interrupt, if you rewrite the content
of the mask register, when the value of the input terminal
which becomes the interrupt input is in the active status,
the factor flag for input interrupt may be set. Therefore,
when using the input interrupt, the active status of the
input terminal implies
input terminal = Low status, when the falling edge
interrupt is effected and
input terminal = High status, when the rising edge
interrupt is effected.
Active status
Factor flag set Not set
,
being the interrupt due to the falling edge and
EPSON
Active status
Rising edge interrupt
Factor flag set
S1C6S3N2 TECHNICAL SOFTWARE

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