Programming Notes - Epson S1C6S3N2 Technical Manual

TMRST:
Clock timer reset
(07EH·D3)

Programming notes

S1C6S3N2 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Clock Timer)
This bit resets the clock timer.
When "1" is written :
When "0" is written :
Read-out :
The clock timer is reset by writing "1" to TMRST. The clock
timer starts immediately after this. No operation results
when "0" is written to TMRST.
This bit is write-only, and so is always "0" at read-out.
(1) When the clock timer has been reset, the interrupt factor
flag (TI) may sometimes be set to "1". Consequently,
perform flag read-out (reset the flag) as necessary at
reset.
(2) The input clock of the watchdog timer is the 2 Hz signal
of the clock timer, so that the watch dog timer may be
counted up at timer reset.
(3) Reading of interrupt factor flags is available at EI, but be
careful in the following cases.
If the interrupt mask register value corresponding to the
interrupt factor flags to be read is set to "1", an interrupt
request will be generated by the interrupt factor flags set
timing, or an interrupt request will not be generated.
Be very careful when interrupt factor flags are in the
same address.
EPSON
Clock timer reset
No operation
Always "0"
I-65