Epson S1C6S3N2 Technical Manual page 99

Cmos 4-bit single chip microcomputer
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CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (SVD Circuit and Heavy Load Protection Function)
S1C6S3N2 TECHNICAL HARDWARE
(2) BLS resides in the same bit at the same address as BLD,
and one or the other is selected by write or read opera-
tion. This means that arithmetic operations (AND, OR,
ADD, SUB and so forth) at this address, pay attention to
whether BLD is ON or OFF.
(3) Select one of the following software processing to return
to the normal mode after a heavy load has been driven in
the heavy load protection mode (S1C6S3L2/6S3B2).
After heavy load drive is completed, return to the
normal mode after at least one second has elapsed.
After heavy load drive is completed, switch BLS ON
and OFF (at least 100 µs is necessary for the ON
status) and then return to the normal mode.
The S1C6S3N2/6S3A2 returns to the normal mode after
driving a heavy load without special software processing.
(4) When the BLS is to be turned on during operation in the
heavy load protection mode, limit the ON time to 10 msec
per second of operation time.
EPSON
I-87

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