Control Of Input Ports - Epson S1C6S3N2 Technical Manual

Control of input ports

Table 4.4.1 Input port control bits
Address
D3
K03
073H
DFK03
074H
EIK03
075H
0
R
077H
IK1
07AH
*1 Initial value at the time of initial reset
*2 Not set in the circuit
*3 Undefined
*4 Reset (0) immediately after being read
*5 Constantly "0" when being read
S1C6S3N2 TECHNICAL HARDWARE
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Input Ports)
Table 4.4.1 list the input ports control bits and their ad-
dresses.
Register
D2 D1 D0 Name
K02 K01 K00 K03
R
K02
K01
K00
DFK02 DFK01 DFK00 DFK03
R/W
DFK02
DFK01
DFK00
EIK02 EIK01 EIK00 EIK03
R/W EIK02
EIK01
EIK00
EIK10 DFK10 K10
EIK10
R/W R
DFK10
K10
IK0 SWIT1 SWIT0 IK1
R IK0
SWIT1
SWIT0
SR 1 0
*1
*2
– High Low
*2
– High Low
*2
– High Low
*2
– High Low
0 Falling Rising
0 Falling Rising
0 Falling Rising
0 Falling Rising
0 Enable Mask
0 Enable Mask
0 Enable Mask
0 Enable Mask
*2
0 –
0 Mask
Enable
0 Falling Rising
*2
– High Low
*4
0 Yes No
*4
0 Yes No
*4
0 Yes No
*4
0 Yes No
EPSON
Comment
Input port (K00–K03)
Differential register
(K00–K03)
Interrupt mask register
(K00–K03)
Unused
Interrupt mask register (K10)
Differential register (K10)
Input port (K10)
Interrupt factor flag
(K10)
Interrupt factor flag
(K00–K03)
Interrupt factor flag
(stopwatch 1 Hz)
Interrupt factor flag
(stopwatch 10 Hz)
I-35