Epson S1C6S3N2 Technical Manual page 211

Cmos 4-bit single chip microcomputer
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INTI:
;
;
;
INTI8: LD
;
INTI2: LD
;
INRT:
Note
S1C6S3N2 TECHNICAL SOFTWARE
PUSH
XH
PUSH
XL
PUSH
YH
PUSH
YL
PUSH
A
PUSH
B
PUSH
F
LD
X,79H
LD
Y,YTIB
LD
MY,MX
LD
X,78H
AND
MY,MX
FAN
MY,0001B ;
JP
Z,INTI8
CALL
TI32
Y,YTIB
FAN
MY,0010B ;
JP
Z,INTI2
CALL
TI8
Y,YTIB
FAN
MY,0100B ;
JP
Z,INRT
CALL
TI2
For details on "INRT", see the interrupt routine in "4.5
Example of Interrupt Vector Processing".
Regardless of the setting of the interrupt mask register (ETI),
the interrupt factor flag (TI) is set to "1" at the falling edge of
the corresponding signal. Hence, the presence of an inter-
rupt factor is judged by the result of ANDing the factor flag
stored in the buffer and the interrupt mask register.
EPSON
CHAPTER 5: PERIPHERAL CIRCUITS (Clock Timer)
;
Store value of X register in stack
;
;
Store value of Y register in stack
;
;
Store value of A register in stack
;
Store value of B register in stack
;
Store value of F register in stack
;
(Reset) the timer interrupt factor flags
;
and store in buffer
;
;
Mask the timer interrupt factor flags
;
by the value of the timer interrupt mask register
If the TM32Hz interrupt factor flag is set,
;
and enabled
;
then
"TI32" is executed
;
If the TM8Hz interrupt factor flag is set,
and enabled
;
;
then
"TI8" is executed
;
If the TM2Hz interrupt factor flag is set,
and enabled
;
;
then
"TI2" is executed
II-65

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