Epson S1C6S3N2 Technical Manual page 227

S1C6S3N2 TECHNICAL SOFTWARE
When an interrupt is triggered at the falling edge of an
input terminal, a factor flag is set with the timing of
shown in Figure 5.7.3. However, when clearing the
content of the mask register with the input terminal kept
in the Low status and then setting it, the factor flag of the
input interrupt is again set at the timing that has been
set.
Consequently, when the input terminal is in the active
status (Low status), do not rewrite the mask register
(clearing, then setting the mask register), so that a factor
flag will only set at the falling edge in this case. When
clearing, then setting the mask register, set the mask
register, when the input terminal is not in the active
status (High status).
When an interrupt is triggered at the rising edge of the
input terminal, a factor flag will be set at the timing of
shown in Figure 5.7.3. In this case, when the mask
registers cleared, then set, you should set the mask
register, when the input terminal is in the Low status.
In addition, when the mask register = "1" and the content
of the differential register is rewritten in the input termi-
nal active status, an input interrupt factor flag may be
set. Thus, you should rewrite the content of the differen-
tial register in the mask register = "0" status.
(4) Reading of interrupt factor flags is available at EI, but be
careful in the following cases.
If the interrupt mask register value corresponding to the
interrupt factor flags to be read is set to "1", an interrupt
request will be generated by the interrupt factor flags set
timing, or an interrupt request will not be generated.
Be very careful when interrupt factor flags are in the
same address.
(5) Even when the values of the input data and differential
register changes from non-matching to matching, the
interrupt factor flag is not set to "1".
EPSON
CHAPTER 5: PERIPHERAL CIRCUITS (Input Ports)
II-81