Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 80

4gb flex-muxonenand m-die flash memory
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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
Interleave Cache Program Operation Flow Diagram
Start
1)
Select DataRAM for DDP
Add: F101h DQ=DBS
Write Data into DataRAM0,1
Add: DataRAM DQ=Data(4KB)
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Read Write Protection Status
Add: F24Eh DQ=US,LS,LTS
Write 'FPA, FSA' of Flash
2)
Add: F107h DQ=FPA, FSA
3)
Write 'BSA
, BSC' of DataRAM
2)
Add: F200h DQ=0800h
Write System Configuration
4)
Register
Add: F221h DQ=ECC
Write Cache PGM CMD
Add: F220h DQ=007Fh
NO
Is it first input
for a chip
YES
* DBS, DFS is for DDP
If program operation
*
results in an error,
map out the block
including the page in
error and copy the
target data to another
block.
NOTE :
1) DBS must be set before data input.
2) FSA must be 00 and BSC must be 000 within program operation.
3) BSA must be 1000.
4) Writing System Configuration Register is optional.
5) Host is strongly recommended to see the INT register(F241h) of each chip.
6) Once 'PGM command' is issued onto a chip, the same command(PGM) must be issued onto another chip. If not, Samsung cannot gurantee the following oper-
ation.
7) If error bit is set at this step, DQ[1]~[4] shoulde be checked in order to find where the error occurred.
1)
Select a chip for DDP
Add: F100h DQ=DFS
Add: F101h DQ=DBS
Check INT register
5)
if it is ready
Add: F241h DQ=8040h
Read Controller
Status Register
Add: F240h
DQ[2]=Previous
NO
DQ[4] | DQ[2] = 0?
YES
NO
Last PGM
for a chip?
YES
Write Data into DataRAM0,1
Add: DataRAM DQ=Data(4KB)
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Read Write Protection Status
Add: F24Eh DQ=US,LS,LTS
Write 'FPA, FSA' of Flash
2)
Add: F107h DQ=FPA, FSA
Write System Configuration
4)
Register
Add: F221h DQ=ECC
6)
Write PGM CMD
Add: F220h DQ=0080h
Program Error
- 80 -
1)
Select a chip for DDP
Add: F100h DQ=DFS
Add: F101h DQ=DBS
Check INT register
3)
if it is ready
Add: F241h DQ=8040h
Read Controller
Status Register
Add: F240h
DQ[2]=Previous
NO
DQ[4] | DQ[2] = 0?
YES
Write Data into DataRAM0,1
Add: DataRAM DQ=Data(4KB)
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Read Write Protection Status
Add: F24Eh DQ=US,LS,LTS
Write 'FPA, FSA' of Flash
2)
Add: F107h DQ=FPA, FSA
Write System Configuration
4)
Register
Add: F221h DQ=ECC
6)
Write PGM CMD
Add: F220h DQ=0080h
Wait for INT register
5)
low to high transition
Add: F241h DQ=8040h
Read Controller
7)
Status Register
Add: F240h DQ[10]=Error
FLASH MEMORY
NO
DQ[10]=0?
YES
1)
Select DataRAM for DDP
Add: F101h DQ=DBS
Check INT register
5)
if it is ready
Add: F241h DQ=8040h
Read Controller
7)
Status Register
Add: F240h DQ[10]=Error
NO
DQ[10]=0?
YES
complete

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