Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 45

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
2.8.19 System Configuration 1 Register F221h (R, R/W)
This Read/Write register describes the system configuration.
F221h, default =40C0h
15 14 13 12
R/W R/W
RM BRWL
Read Mode (RM)
RM
0
1
Read Mode Information[15]
Item
RM
Burst Read Write Latency (BRWL)
BRWL
000~010
011
100 (default)
101
110
111
* Default value of BRWL and HF value is BRWL=4, HF=0.
For host frequency over 66MHz, BRWL should be 6 or 7 while HF is 1.
For host frequency range of 40MHz~66MHz, BRWL should be set to 4~7 while HF is 0.
For host frequency under 40MHz, BRWL should be set to 3~7 while HF is 0.
Burst Read Write Latency (BRWL) Information[14:12]
Item
BRWL
11 10 9 8
R/W R/W
BL ECC
Definition
Read Mode
under 40MHz
(HF=0)
3(up to 40MHz. min)
4
5
6
7
Definition
Burst Read Latency /
Burst Write Latency
- 45 -
7 6 5 4
R/W R/W R/W R/W
RDY INT RDY
IOBE
pol pol Conf
Read Mode
Asynchronous read(default)
Synchronous read
Selects between asynchronous read mode and
Latency Cycles (Read/Write)
40MHz~66MHz
(HF=0)
Reserved
3(N/A)
4(min.)
5
6
7
Specifies the access latency in the burst
read / write transfer for the initial access
FLASH MEMORY
3 2 1 0
R R/W R/W R
Reserv
HF WM BWPS
ed
Description
synchronous read mode
over 66MHz
(HF=1)
3(N/A)
4(N/A)
5(N/A)
6(min.)
7
Description