Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 43

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
2.8.18 Command Register F220h (R/W)
Command can be issued by two following methods, and user may select one way or the other to issue appropriate command;
1. Write command into Command Register when INT is at ready state. INT will automatically turn to busy state as command is issued. Once
the desired operation is completed, INT will go back ready state.
2. Write 0000h to INT bit of Interrupt Status Register, and then write command into Command Register. Once the desired operation is com-
pleted, INT will go back to ready state.
(00F0h and 00F3h may be accepted during busy state of some operations. Refer to the right most column of the command register table
below.)
F220h, default = 0000h
15 14 13 12
CMD
0000h
0003h
0005h
0080h
007Fh
0023h
002Ah
002Ch
0027h
0094h
00B0h
0030h
00F0h
00F3h
0065h
0066h
NOTE :
1) LSB page recovery Read command can always be issued but not in the PI Block access mode.
2) In PI Block Access mode, PI update can be issued.
3) 'Reset Flex-MuxOneNAND'(=Hot reset) command makes the registers and NAND Flash core into default state.
11 10 9 8
Command
Load a page unit into buffer
Superload a page unit from buffer
1)
LSB page recovery Read
2)
PI update
Program a page unit from buffer &
Finish Program operation at Cache Program operation
Cache Program operation
Unlock NAND array a block
Lock NAND array a block
Lock-tight NAND array a block
All Block Unlock
Block Erase
Erase Suspend
Erase Resume
Reset NAND Flash Core
3)
Reset Flex-MuxOneNAND
OTP Access
Access to Partition Information(PI) Block
- 43 -
7 6 5 4
Operation
FLASH MEMORY
3 2 1 0
Acceptable
command
during busy
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
00F0h, 00F3h
-
-
00F0h, 00F3h
00F0h, 00F3h