Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 112

4gb flex-muxonenand m-die flash memory
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Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
5.5 AC Characteristics for Asynchronous Read
See Timing Diagrams 6.3 and 6.4.
Parameter
Access Time from CE Low
Asynchronous Access Time from AVD Low
Asynchronous Access Time from address valid
Read Cycle Time
AVD Low Time
Address Setup to rising edge of AVD
Address Hold from rising edge of AVD
Output Enable to Output Valid
CE Setup to AVD falling edge
CE Disable to Output & RDY High Z
1)
OE Disable to Output High Z
AVD High to OE Low
CE Low to RDY Valid
WE Disable to AVD Enable
Address to OE low
NOTE :
1) If OE is disabled at the same time or before CE is disabled, the output will go to high-z by tOEZ.
If CE is disabled at the same time or before OE is disabled, the output will go to high-z by tCEZ.
If CE and OE are disabled at the same time, the output will go to high-z by tOEZ.
These parameters are not 100% tested.
2) This Parameter is valid at toggle bit timing in asynchronous read only. (timing diagram 6.20 and 6.21)
5.6 AC Characteristics for Warm Reset (RP), Hot Reset and NAND Flash Core Reset
See Timing Diagrams 6.16, 6.17 and 6.18.
RP & Reset Command Latch to BootRAM Access
RP & Reset Command Latch(During Load Routines) to INT High (Note1)
RP & Reset Command Latch(During Program Routines) to INT High (Note1)
RP & Reset Command Latch(During Erase Routines) to INT High (Note1)
RP & Reset Command Latch(NOT During Internal Routines) to INT High (Note1)
RP Pulse Width (Note2)
NOTE :
1) These parameters are tested based on INT bit of interrupt register. Because the time on INT pin is related to the pull-up and pull-down resistor value.
2) The device may reset if tRP < tRP min(200ns), but this is not guaranteed.
1)
Parameter
KFM4GH6Q4M/
KFN8GH6Q4M/
Symbol
KFKAGH6Q4M(TBD)
Min
t
-
CE
t
-
AA
t
-
ACC
t
76
RC
t
12
AVDP
t
5
AAVDS
t
6
AAVDH
t
-
OE
t
0
CA
t
-
CEZ
t
-
OEZ
t
0
AVDO
t
-
CER
t
15
WEA
t
10
2)
ASO
Symbol
tReady1
(BufferRAM)
tReady2
(NAND Flash Array)
tReady2
(NAND Flash Array)
tReady2
(NAND Flash Array)
tReady2
(NAND Flash Array)
tRP
- 112 -
FLASH MEMORY
Unit
Max
76
ns
76
ns
76
ns
-
ns
-
ns
-
ns
-
ns
20
ns
-
ns
20
ns
15
ns
-
ns
15
ns
-
ns
-
ns
Min
Max
Unit
-
5
µs
-
10
µs
-
20
µs
-
150
µs
-
10
µs
200
-
ns

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