Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 127

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
6.16 Warm Reset Timing
See AC Characteristics Table 5.6
CE, OE
RP
RDY
INT
bit
Operation
1)
Idle
Status
NOTE :
1) The status which can accept any register based operation(Load, Program, Erase command, etc).
2) The status where reset is ongoing.
3) The status allows only BootRAM(BL1) read operation for Boot Sequence.(Refer to 7.2.2 Boot Sequence)
4) To read BL2 of Boot Sequence, Host should wait INT until becomes ready. and then, Host can issue load command.
(Refer to 7.2.2 Boot Sequence, 7.1 Methods of Determining Interrupt status)
t
RP
t
Ready1
High-Z
t
Ready2
2)
Reset Ongoing BootRAM Access
3) 4)
INT Bit Polling
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FLASH MEMORY
High-Z
1)
Idle