Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 134

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
7.1.2 Polling the Interrupt Register Status Bit
An alternate method of determining the end of an operation is to continuously monitor the Interrupt Status Register Bit instead of using the INT
pin.
When using interrupt register instead of INT pin, INT must be unconnected
.
This can be configured in either a synchronous mode or an asynchronous mode.
Synchronous Mode Using Interrupt Status Register Bit Polling
When operating synchronously, CE, AVD, CLK, RDY, OE, and DQ pins on the host and Flex-MuxOneNAND are tied together.
RDY could be connected as one of following guides.
Host
RDY(WAIT)
Asynchronous Mode Using Interrupt Status Register Bit Polling
When configured to operate in an asynchronous mode, CE, AVD, OE and DQ of the Flex-MuxOneNAND are tied to corresponding pins of the
Host. CLK is tied to the Host Vss (Ground). RDY is NOT connected.
Command
INT
Flex-MuxOneNAND
CE CE
AVD
AVD
CLK CLK
RDY
OE OE
DQ DQ
Handshaking Mode
Host
CE
AVD
Vss
OE
DQ
Host
Flex-MuxOneNAND
CE
AVD
CLK
OE
DQ
Non-Handshaking Mode
Flex-MuxOneNAND
CE
AVD
CLK
RDY
OE
DQ
- 134 -
FLASH MEMORY
CE
AVD
CLK
RDY
OE
DQ