Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 36

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
2.8 Registers
Section 2.8 of this specification provides information about the Flex-MuxOneNAND4G registers.
2.8.1 Register Address Map
This map describes the register addresses, register name, register description, and host accessibility.
Address Address
(word order) (byte order)
F000h
F001h
F002h
F003h
F004h
F005h
F006h
F007h~F0FFh 1E00Eh~1E1FEh
F100h
F101h
F102h~F106h 1E204h~1E20Ch
F107h
F108h~F1FFh 1E210h~1E3FEh
F200h
F201h~F21Fh 1E402h~1E43Eh
F220h
F221h
F222h~F22Fh 1E444h~1E45Eh
F230h~F23Fh 1E460h~1E47Eh
F240h
F241h
F242h~F24Bh 1E484h~1E496h
F24Ch
F24Dh
F24Eh
F24Fh~FEFFh 1E49Eh~1FDFEh
FF00h
FF01h
FF02h
FF03h
FF04h~FFFFh 1FE08h~1FFFEh
Name
1E000h Manufacturer ID
1E002h Device ID
1E004h Version ID
1E006h Data Buffer size
1E008h Boot Buffer size
Amount of
1E00Ah
buffers
1E00Ch Technology
Reserved
1E200h Start address 1
1E202h Start address 2
Reserved
1E20Eh Start address 8
Reserved
1E400h Sector Count
Reserved
1E440h Command
System
1E442h
Configuration 1
Reserved
Reserved
1E480h Controller Status
1E482h Interrupt
Reserved
Start
1E498h
Block Address
1E49Ah Reserved
Write Protection
1E49Ch
Status
Reserved
ECC Status
1FE00h
Register 1
ECC Status
1FE02h
Register 2
ECC Status
1FE04h
Register 3
ECC Status
1FE06h
Register 4
Reserved
Host
Access
R Manufacturer identification
R Device identification
R N/A
R Data buffer size
R Boot buffer size
R Amount of data/boot buffers
R Info about technology
- Reserved for user
Chip address for selection of NAND
R/W
Core in DDP & Block address
R/W Chip address for selection of BufferRAM in DDP
- Reserved for user
R/W NAND Flash Page & Sector Address
- Reserved for user
Sector Number for the page data transfer from the memory
R/W
and the BufferRAM
- Reserved for vendor specific purposes
R/W Host control and memory operation commands
R, R/W memory and Host Interface Configuration
- Reserved for user
- Reserved for vendor specific purposes
R Controller Status and result of memory operation
R/W Memory Command Completion Interrupt Status
- Reserved for user
R/W Start memory block address in Write Protection mode
- Reserved for user
Current memory Write Protection status
R
(unlocked/locked/tight-locked)
- Reserved for user
R ECC status of sector0 and sector 1
R ECC status of sector2 and sector 3
R ECC status of sector4 and sector 5
R ECC status of sector6 and sector 7
- Reserved for vendor specific purposes
- 36 -
FLASH MEMORY
Description