Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 100

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
1st Block OTP Lock Operation Flow Chart
Write 'DFS, FBA' of Flash
Add: F100h DQ=DFS, FBA
Select DataRAM for DDP
Add: F101h DQ=0000h(DBS*)
Write 0 to interrupt register
Write 'OTP Access' Command
Write Data into DataRAM
in sector4 of main of the page49
* DBS, DFS is for DDP
NOTE :
1) FBA(NAND Flash Block Address) could be omitted or any address.
2) 'Write 0 to interrupt register' step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1
3) Data input could be done anywhere between "Start" and "Write Program Command".
4) FBA must be 0000.
5) FSA must be 00 within program operation. The 0196h is the page49 of NAND Flash Array address map.
6) BSA must be 1000 and BSC must be 000.
Start
1)
2)
Add: F241h DQ=0000h
Add: F220h DQ=0065h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
3)
Add: 1st Word
DQ=XXF3h(Locking bit)
Write 'FBA' of Flash
Add: F100h DQ=FBA
Write 'FPA, FSA' of Flash
Add: F107h DQ=0196h
Write 'BSA, BSC' of DataRAM
Add: F200h DQ=0800h
Write 0 to interrupt register
Add: F241h DQ=0000h
Write Program command
Add: F220h
DQ=0080h
Wait for INT register
low to high transition
Add: F241h DQ[15]=INT
Do Cold reset
Automatically
updated
Update Controller
Status Register
Add: F240h
DQ[5]=1(OTP
1st Block OTP lock completed
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FLASH MEMORY
4)
5)
6)
2)
)
BL