Samsung FLEX-MUXONENAND KFKAGH6Q4M Specifications page 44

Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
2.8.18.1 Two Methods to Clear Interrupt Register in Command Input
To clear Interrupt Register in command input, user may select one from either following methods.
First method is to turn INT to low by manually writing 0000h to INT bit of Interrupt Register.
Second method is to input command while INT is high, and the device will automatically turn INT to low.
(Second method is equivalent with method used in general NAND Flash)
User may choose the desirable method to clear Interrupt Register.
Method 1: Manually set INT=0 before writing command into Command Register: Manual INT Mode
(1) Clear Interrupt Register (F241h) by writing 0000h into INT bit of Interrupt Register. This operation will make INT pin turn low.
(2) Write command into Command Register. This will make the device to perform the designated operation.
(3) INT pin will turn back to high once the operation is completed.
INT pin1)
INT bit
Write 0 into
INT bit of
Interrupt Register
Method 2: Write command into Command Register at INT ready state: Auto INT Mode
(1) Write command into Command Register. This will automatically turn INT from high to low.
(2) INT pin will turn back to high once the operation is completed.
INT pin1)
INT bit
Write command into
Command Register
1)
Write command into
Command Register
NOTE : 1) INT pin polarity is based on 'IOBE=1 and INT pol=1 (default)' setting
1)
INT will automatically
turn to Busy State
NOTE : 1) INT pin polarity is based on 'IOBE=1 and INT pol=1 (default)' setting
1)
INT will automatically turn to high
when designated operation is completed.
1)
INT will automatically turn back to ready state
when designated operation in completed.
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FLASH MEMORY
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