Flex-MuxOneNAND4G(KFM4GH6Q4M-DEBx)
Flex-MuxOneNAND8G(KFN8GH6Q4M-DEBx)
Flex-MuxOneNAND16G(KFKAGH6Q4M-DEBx)
6.14 Block Erase Operation Timing
See AC Characteristics Table 5.7 and Table 5.9
t
AAVDS
AVD
t
AVDP
A/DQ0:
AA
A/DQ15
t
CS
CE
OE
t
CER
WE
V
IL
CLK
INT
bit
Hi-Z
NOTE :
1) AA = Address of address register
CA = Address of command register
ECD = Erase Command
EMA = Address of memory to be erased
SA = Address of status register
2) For "In progress" and "complete" status, refer to status register.
3) Status reads in this figure is asynchronous read, but status read in synchronous mode is also supported.
Erase Command Sequence
t
WEA
t
AAVDH
EMA
CA
ECD
t
DS
t
WPL
t
WPH
t
WC
Read Status Data
In
SA
Progress
t
DH
t
CER
t
CH
t
BERS1
t
CEZ
- 125 -
FLASH MEMORY
SA
Completed
t
CEZ