Chipset Configuration; North Bridge - Supermicro SuperStorage Server 6048R-E1CR90L User Manual

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SuperStorage Server 6048-E1CR90L User's Manual
the P-state coordination type for hardware components only. Select SW_ALL to change
the P-state coordination type for all software installed in the system. Select SW_ANY to
change the P-state coordination type for a software program in the system. The options
are HW_All, SW_ALL, and SW_ANY.
 CPU C State Control (Available when Power Technology is set to
Custom)
Package C State limit
Use this item to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, and C6 (Retention) state.
CPU C3 Report
Select Enable to allow the BIOS to report the CPU C3 state (ACPI C2) to the operating
system. During the CPU C3 state, the CPU clock generator is turned off. The options are
Enable and Disable.
CPU C6 Report (Available when Power Technology is set to Custom)
Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating
system. During the CPU C6 state, power to all cache is turned off. The options are Enable
and Disable.
Enhanced Halt State (C1E)
Select Enable to use the "Enhanced Halt State" feature, which will significantly reduce the
CPU's power consumption by reducing CPU's clock cycle and voltage during a "Halt State."
The options are Disable and Enable.
 CPU T State Control (Available when Power Technology is set to
Custom)
ACPI (Advanced Configuration Power Interface) T-States
If this item is set to Enable, CPU throttling will be supported by the operating system to
reduce power consumption. The options are Enable and Disable.
Chipset Configuration
Caution! Please set the correct settings for the items below. A wrong configuration setting
may cause the system to malfunction.
North Bridge
This feature allows the user to configure the settings for the Intel North Bridge.
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