Appendix D Port States In The Different Processing States - Hitachi HD6473867 Hardware Manual

Appendix D Port States in the Different Processing States

Table D-1 Port States Overview
Port Reset
P1 to High
7
P1 impedance
0
P3 to P3 High
7 0
impedance*
P4 to P4 High
3 0
impedance
P5 to P5 High
7 0
impedance
P6 to P6 High
7 0
impedance
P7 to P7 High
7 0
impedance
P8 to P8 High
7 0
impedance
PA to PA High
3 0
impedance
PB to PB High
7 0
impedance impedance impedance impedance impedance impedance impedance
Notes: 1. High level output when MOS pull-up is in on state.
2. P3 is Functions
2
Sleep Subsleep Standby
Retained Retained
Retained Retained
2
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
Retained Retained
High High
Watch
High Retained
1
impedance*
High Retained
1
impedance*
High Retained
impedance
High Retained
1
impedance*
High Retained
impedance
High Retained
impedance
High Retained
impedance
High Retained
impedance
High High
470
Subactive Active
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
Functions Functions
High High