Hitachi HD6473867 Hardware Manual page 374

Table 15-3 Control Signal Timing (cont)
V = 1.8 V to 5.5 V, AV
CC
(including subactive mode) unless otherwise indicated.
Item Symbol
External clock high t
CPH
width
External clock low t
CPL
width
External clock rise t
CPr
time
External clock fall t
CPf
time
Pin RES low width
t
REL
Input pin high width t
IH
Input pin low width t
IL
UD pin minimum t
UDH
modulation width t
UDL
1.
Notes: Selected with SA1 and SA0 of system clock control register 2 (SYSCR2).
2.
Internal power supply step-down circuit not used
= 1.8 V to 5.5 V, V
CC
Applicable
Pins Min Typ
OSC 70
1
100
140
200
400
X —
1
OSC 70
1
100
140
200
400
X —
1
OSC —
1
—
—
X —
1
OSC —
1
—
—
X —
1
RES
10
IRQ to IRQ
, 2
0 4
WKP to WKP
0 7
ADTRG,
TMIC
TMIF, TMIG,
AEVL, AEVH
IRQ to IRQ
, 2
0 4
WKP to WKP
,
0 7
ADTRG,
TMIC,
TMIF, TMIG,
AEVL, AEVH
UD 4
= AV = 0.0 V, T
SS SS
Values
Max Unit
— — ns
— —
— —
— —
— —
15.26 — µs
or
13.02
— — ns
— —
— —
— —
— —
15.26 — µs
or
13.02
— 20 ns
— 30
— 55
— 55.0 ns
— 20 ns
— 30
— 55
— 55.0 ns
— — t
cyc
— — t
cyc
t
subcyc
— — t
cyc
t
subcyc
— — t
cyc
t
subcyc
370
= –20°C to +75°C
a
Reference
Test Condition
V = 4.5 V to 5.5 V Figure 15-1
CC
V = 3.0 V to 5.5 V *
CC
V = 2.6 V to 5.5 V
CC
V = 2.2 V to 5.5 V Figure 15-1
CC
Except the above
V = 4.5 V to 5.5 V Figure 15-1
CC
V = 3.0 V to 5.5 V *
CC
V = 2.6 V to 5.5 V
CC
V = 2.2 V to 5.5 V Figure 15-1
CC
Except the above
V = 4.5 V to 5.5 V Figure 15-1
CC
V = 2.6 V to 5.5 V *
CC
Except the above
V = 4.5 V to 5.5 V Figure 15-1
CC
V = 2.6 V to 5.5 V
*
CC
Except the above
Figure 15-2
Figure 15-3
Figure 15-3
Figure 15-4
Figure
2
2
2
Figure 15-1
2
Figure 15-1