Interrupt Control Registers - Hitachi HD6473867 Hardware Manual

3.3.2 Interrupt Control Registers

Table 3-3 lists the registers that control interrupts.
Table 3-3 Interrupt Control Registers
Name
IRQ edge select register
Interrupt enable register 1
Interrupt enable register 2
Interrupt request register 1
Interrupt request register 2
Wakeup interrupt request register
Wakeup edge select register
Note: * Write is enabled only for writing of 0 to clear a flag.
1. IRQ edge select register (IEGR)
Bit
Initial value
Read/Write
IEGR is an 8-bit read/write register used to designate whether pins IRQ
edge sensing or falling edge sensing.
Bits 7 to 5: Reserved bits
Bits 7 to 5 are reserved: they are always read as 1 and cannot be modified.
Bit 4: IRQ edge select (IEG4)
4
Bit 4 selects the input sensing of the IRQ
Bit 4
IEG4 Description
0 Falling edge of IRQ
1 Rising edge of IRQ
Abbreviation
IEGR
IENR1
IENR2
IRR1
IRR2
IWPR
WEGR
7 6
— —
1 1
— —
and ADTRG pin input is detected
4
and ADTRG pin input is detected
4
R/W
R/W
R/W
R/W
R/W*
R/W*
R/W*
R/W
5 4
— IEG4 IEG3
1 0
— R/W R/W
pin and ADTRG pin.
4
67
Initial Value
H'E0
H'00
H'00
H'20
H'00
H'00
H'00
3 2
IEG2 IEG1
0 0
R/W R/W
to IRQ
4 0
Address
H'FFF2
H'FFF3
H'FFF4
H'FFF6
H'FFF7
H'FFF9
H'FF90
1 0
IEG0
0 0
R/W
are set to rising
(initial value)