Clock Stop Register 2 (Ckstpr2) - Hitachi HD6473867 Hardware Manual

13.2.4

Clock Stop Register 2 (CKSTPR2)

Bit
—
Initial value
Read/Write —
CKSTPR2 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bit relating to the LCD controller/driver is described here. For details of the
other bits, see the sections on the relevant modules.
Bit 0: LCD controller/driver module standby mode control (LDCKSTP)
Bit 0 controls setting and clearing of module standby mode for the LCD controller/driver.
Bit 0
LDCKSTP Description
0 LCD controller/driver is set to module standby mode
1 LCD controller/driver module standby mode is cleared
7 6
— —
1 1
— —
5 4
—
AECKSTP
1 1
— R/W
335
3 2
WDCKSTP PWCKSTP
1 1
R/W R/W
1 0
LDCKSTP
1 1
R/W
(initial value)