Clock Stop Register 1 (Ckstpr1) - Hitachi HD6473867 Hardware Manual

10.2.9 Clock stop register 1 (CKSTPR1)

Bit 7
—
Initial value 1
R/W
Read/Write
CKSTPR1 is an 8-bit read/write register that performs module standby mode control for peripheral
modules. Only the bits relating to SCI3 are described here. For details of the other bits, see the
sections on the relevant modules.
Bit 6: SCI3-1 module standby mode control (S31CKSTP)
Bit 6 controls setting and clearing of module standby mode for SCI31.
S31CKSTP Description
0 SCI3-1 is set to module standby mode
1 SCI3-1 module standby mode is cleared
Note: All SCI31 register is initialized in module standby mode.
Bit 5: SCI3-2 module standby mode control (S32CKSTP)
Bit 5 controls setting and clearing of module standby mode for SCI32.
S32CKSTP Description
0 SCI3-2 is set to module standby mode
1 SCI3-2 module standby mode is cleared
Note: All SCI32 register is initialized in module standby mode.
6 5
S31CKSTP S32CKSTP ADCKSTP TGCKSTP
1 1
R/W R/W
4 3
TFCKSTP TCCKSTP TACKSTP
1 1
R/W
R/W
268
2 1
1 1
R/W R/W
(initial value)
(initial value)
0
1
R/W