Overview - Xilinx KCU105 User Manual

Introduction
This document describes the features and functions of the PCI Express® Control Plane
targeted reference design (TRD). The TRD comprises a base design and a user extension
design. The user extension design adds custom logic on top of the base design. The
pre-built user extension design in this TRD adds another AXI block RAM controller to the
design and sets up ingress translations through BAR4 to access this memory space.

Overview

The TRD targets the Kintex® UltraScale™ XCKU040-2FFVA1156E FPGA running on the
KCU105 evaluation board. It demonstrates a control plane application using a PCI Express
Endpoint block in a x1 Gen1 configuration. Simple base address register (BAR)-mapped
read and write transactions are demonstrated using a kernel mode software driver
controlled by the Control & Monitoring graphical user interface (GUI). The top-level block
diagram of the TRD is shown in
X-Ref Target - Figure 1-1
Figure 1-1: KCU105 PCI Express Control Plane Targeted Reference Design
PCI Express Control Plane TRD
UG918 (v2017.2) July 18, 2017
Figure 1-1.
KCU105 Evaluation Board
XCKU040-2FFVA1156E FPGA
www.xilinx.com
Chapter 1
UG918_c1_01_021315
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