Xilinx KCU105 User Manual page 19

b. In the Bitstream file field, browse to the location of the BIT file
<working_dir>/kcu105_control_plane/ready_to_test/trd01.bit and
click Program (see
X-Ref Target - Figure 3-5
5. Check the status of the design by observing the GPIO LEDs positioned at the top right
corner of the KCU105 board
left to right indicate
LED position 1: Heartbeat LED, flashes if the PCIe user clock is present
°
LED position 0: ON if the PCIe link is UP
°
The LED position numbering used here matches with the LED positions on the board.
Note:
X-Ref Target - Figure 3-6
PCI Express Control Plane TRD
UG918 (v2017.2) July 18, 2017
Figure 3-5).
Figure 3-5: Program Device Window
(Figure 3-6). After FPGA configuration, the LED status from
Figure 3-6: GPIO LED Indicators
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Chapter 3: Bringing Up the Design
UG918_c3_07_070717
UG918_c3_08_091314
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