Xilinx KCU105 User Manual page 42

To enable read access to both block RAM controllers, an additional ingress translation
aperture can be mapped and the ReadUserReg function in the driver can be used to access
those registers. The display from the software driver can be seen in the system dmesg log.
The ability to read multiple user registers or block RAM controllers is not supported by the
GUI, and the aperture size is currently limited to 4K.
PCI Express Control Plane TRD
UG918 (v2017.2) July 18, 2017
Chapter 5: Targeted Reference Design Details and Modifications
www.xilinx.com 42
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