Xilinx KCU105 User Manual page 7

Table 1-1: Base Design Resource Utilization (Cont'd)
Resource Type
GTHE3_CHANNEL
GTHE3_COMMON
Table 1-2: User Extension Design Resource Utilization
Resource Type
CLB Registers
CLB LUTs
Block RAM
MMCME3_ADV
Global Clock Buffers
BUFG_GT
SYSMONE1
IOB
GTHE3_CHANNEL
GTHE3_COMMON
PCI Express Control Plane TRD
UG918 (v2017.2) July 18, 2017
Available
20
5
Available
484,800
242,400
600
10
240
120
1
520
20
5
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Chapter 1: Introduction
Used Usage (%)
1
0
Used Usage (%)
44,395
27,817
24
1
3
5
1
16
1
0
Send Feedback
5
0
9.16
11.48
4
10
1.25
4.17
100
3.08
5
0
7