Reset Start Timing - Hitachi H8/3152 Hardware Manual

SP–4
SP–3
SP–2
SP–1
SP (R7)
Legend:
PC : Upper 8 bits of program counter (PC)
H
PC : Lower 8 bits of program counter (PC)
L
CCR: Condition code register
SP: Stack pointer
Notes: 1. The program counter indicates the address of the first instruction that will be
executed after the return.
2. Registers must be saved and restored by word access starting at an even address.
* Ignored on return.
Figure 2.13 Stack before and after Interrupt Exception-Handling Sequence
2.7.4

Reset Start Timing

The reset start timing of the H8/3150 series, that is, the number of clock cycles between the rising
edge of RES and the reset vector fetch cycle, is a maximum of 200 external clock cycles.
Stack area
Before
Save on stack
SP (R7)
SP+1
SP+2
SP+3
SP+4
CCR
CCR*
PC
H
PC
L
Even
address
After
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