1.1
Overview
The H8/3150 series is a single-chip microcomputer unit (MCU) built around a high-speed H8/300
CPU core. An EEPROM, a ROM, a RAM, two I/O ports, a random number generator (RNG), and
a watchdog timer (WDT) are integrated onto the H8/3150 series chip.
Operating at a maximum 5-MHz internal clock rate at 5 V, the H8/300 CPU rapidly executes bit-
manipulation instructions, arithmetic and logic instructions, and data transfer instructions.
Table 1.1 lists the features of the H8/3150 series.
Table 1.1
Features
Item
CPU
Section 1 Overview
Specification
H8/300 CPU
Two-way general register configuration
•
Sixteen 8-bit registers, or
•
Eight 16-bit registers
High-speed operation
•
Maximum clock rate: internal clock 5 MHz (at 5 V)
•
Add/subtract: 0.4 µs
•
Multiply/divide: 2.8 µs
Streamlined, concise instruction set
•
Instruction length: 2 or 4 bytes
•
Register-register arithmetic and logic operations
•
MOV instruction for data transfer between registers and memory
Instruction set features
•
Multiply instruction (8 bits × 8 bits)
•
Divide instruction (16 bits ÷ 8 bits)
•
Bit-accumulator instructions
Register-indirect specification of bit positions
•
EEPROM write instruction (EEPMOV instruction)
1