Hitachi H8/3152 Hardware Manual page 10

Table 1.1 Features (cont)
Item
Watchdog timer
(WDT)
(option)
Interrupts
Power
Clock frequency
range
Operating
temperature
Power-down state
Security
Specification
•
Issues a UDF interrupt at a required interval.
•
Issues an EWE interrupt before an EEPMOV instruction is executed.
•
Stops the on-chip functions when the halt flag is set.
•
One of four counter clock sources can be selected.
Note: Specify whether to operate or stop the WDT for each ROM code. If
specifying that the WDT stops, do not access WDT control registers.
Two external interrupt pins: I/O-1/IRQ and I/O-2/IRQ
•
Used for interrupt input in sleep mode
•
Same exception handling vector is assigned to both interrupts
Two internal interrupts: EWE and UDF from WDT
Note: When sleep mode is entered, set DDR to 0 to use the pins as I/O input
ports before executing a SLEEP instruction. When writing to the DDR7 and
DDR6 bits, use the MOV instruction instead of the bit manipulation
instruction.
Single-voltage power supply
•
4.5 V to 5.5 V
•
2.7 V to 3.3 V
When the CPU operates at the external clock frequency (CPUCS0 = 1):
•
f = 1 MHz to 5 MHz (V
CLK
•
f = 1 MHz to 4 MHz (V
CLK
When the CPU operates at half of the external clock frequency
(CPUCS0 = 0):
•
f = 1 MHz to 10 MHz (V
CLK
•
f = 1 MHz to 5 MHz (V
CLK
(f : External clock frequency)
CLK
Note*: For H8/3153, f
f = 1 MHz to 4 MHz (V
CLK
–25 to +85°C
Sleep mode (The sleep mode is entered by the SLEEP instruction)
•
High frequency detector
•
High voltage detector
•
Low frequency detector
•
Low voltage detector
•
Illegal access detector
= 4.5 V to 5.5 V)
CC
= 2.7 V to 3.3 V)
CC
= 4.5 V to 5.5 V) *
CC
= 2.7 V to 3.3 V) *
CC
= 1 MHz to 5 MHz (V
CLK
= 2.7 V to 3.3 V).
CC
= 4.5 V to 5.5 V), and
CC
3