DR
Data Register
Bit
7
DR7
Initial value
—
Read/Write
R/W
Data Register Bit 7
Output data latch of I/O-1
DDR
Data Direction Register
Bit
7
DDR7
Initial value
0
Read/Write
W
Data Direction Register Bit 7
Selects the input/output direction of I/O-1
0
Input
1
Output
134
6
5
DR6
—
—
R/W
Data Register Bit 6
Output data latch of I/O-2
6
5
DDR6
—
0
W
Data Direction Register Bit 6
Selects the input/output direction of I/O-2
0
Input
1
Output
4
3
—
—
—
4
3
2
—
—
—
I/O
2
1
0
—
—
I/O
1
0
—
—