Table of Contents
Advertisement
12.2.5
DC Characteristics (3 V, CPU operates at half of the external clock frequency)
Conditions: V
= 2.7 to 3.3 V, V
CC
Item
RES
Input high
voltage
CLK
I/O ports
RES
Input low
voltage
CLK
I/O ports
Output high
I/O ports
voltage
Output low
I/O ports
voltage
Input leakage
CLK
current
RES
Input pull-up
1
MOS current*
I/O ports
Current
Normal
2
dissipation *
operation *
Sleep
mode
Pin
5
capacitance*
Notes: 1. The input pull-up MOS's in the RES and I/O port pins are always turned on, even in
sleep mode. To reduce their current, the I/O port pins and RES must be kept high
during sleep mode. The unused I/O port pin must be left as an input pin and left open
(unconnected).
2. Current dissipation assumes that V
are unloaded.
3. Normal operation means an operating mode other than sleep mode. In normal
operation, CLK must be input according to the DC and AC characteristics.
is the external clock frequency. For the H8/3153, 1 MHz ≤ f
4. f
CLK
5. Pin capacitance is the value in the die state.
6. f
is the external clock frequency.
CLK
114
= 0 V, T
= –25 to +85°C, unless otherwise specified.
SS
a
Symbol
Min
× 0.8 —
V
V
IH
CC
× 0.7 —
V
CC
× 0.7 —
V
CC
V
–0.3
IL
–0.3
–0.3
× 0.7 —
V
V
OH
CC
V
0
OL
|I
|
—
in
–I
—
p
—
I
—
CC
3
—
C
—
p
IHmin
Typ
Max
Unit Test Conditions
V
+ 0.3
V
CC
V
+ 0.3
CC
V
+ 0.3
CC
× 0.2
—
V
V
CC
× 0.2
—
V
CC
× 0.2
—
V
CC
V
V
CC
—
0.4
V
µA
—
10
µA
—
150
—
150
—
6
mA
µA
—
100
—
15
pF
= V
– 0.5 V, V
= 0.5 V, and all output pins
CC
ILmax
= –20 µA
I
OH
I
= 1 mA
OL
V
= 0.5 to V
– 0.5 V
in
CC
V
= 0 V
in
1 MHz ≤ f
≤ 5 MHz
4
*
CLK
(I/O ports and RES)
V
in
= V
– 0.5 V to V
CC
CC
1
I/O ports open*
V
= 0 V,
in
6
f
*
= 1 MHz,
CLK
T
= 25°C
a
≤ 4 MHz.
CLK
or
Advertisement
Table of Contents
