UM1940
LL_FLASH_EnableDataCacheReset
Function name
Function description
Return values
Notes
Reference Manual to
LL API cross
reference:
LL_FLASH_DisableDataCacheReset
Function name
Function description
Return values
Reference Manual to
LL API cross
reference:
66.2
SYSTEM Firmware driver defines
66.2.1
SYSTEM
DBGMCU APB1 GRP1 STOP IP
LL_DBGMCU_APB1_GRP1_TIM2_STOP
LL_DBGMCU_APB1_GRP1_TIM3_STOP
LL_DBGMCU_APB1_GRP1_TIM4_STOP
LL_DBGMCU_APB1_GRP1_TIM5_STOP
LL_DBGMCU_APB1_GRP1_TIM6_STOP
LL_DBGMCU_APB1_GRP1_TIM7_STOP
LL_DBGMCU_APB1_GRP1_TIM12_STOP
LL_DBGMCU_APB1_GRP1_TIM13_STOP
LL_DBGMCU_APB1_GRP1_TIM14_STOP
LL_DBGMCU_APB1_GRP1_RTC_STOP
LL_DBGMCU_APB1_GRP1_WWDG_STOP
LL_DBGMCU_APB1_GRP1_IWDG_STOP
LL_DBGMCU_APB1_GRP1_I2C1_STOP
LL_DBGMCU_APB1_GRP1_I2C2_STOP
__STATIC_INLINE void LL_FLASH_EnableDataCacheReset
(void )
Enable Data cache reset.
None:
bit can be written only when the data cache is disabled
FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset
__STATIC_INLINE void LL_FLASH_DisableDataCacheReset
(void )
Disable Data cache reset.
None:
FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset
DocID028236 Rev 2
LL SYSTEM Generic Driver
TIM2 counter stopped when core is halted
TIM3 counter stopped when core is halted
TIM4 counter stopped when core is halted
TIM5 counter stopped when core is halted
TIM6 counter stopped when core is halted
TIM7 counter stopped when core is halted
TIM12 counter stopped when core is halted
TIM13 counter stopped when core is halted
TIM14 counter stopped when core is halted
RTC counter stopped when core is halted
Debug Window Watchdog stopped when
Core is halted
Debug Independent Watchdog stopped
when Core is halted
I2C1 SMBUS timeout mode stopped when
Core is halted
I2C2 SMBUS timeout mode stopped when
Core is halted
1159/1371
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