Oracle Sun Netra T5440 Service Manual page 38

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Running POST in Maximum Mode
Example   1-2
Initiating POST Using the powercycle Command
console
sc>
 
/export/delivery/delivery/4.x/4.x.build_119/post4.x/Niagara/t5440/integrated (root)
2007-07-03 10:25:12.386 0:0:0>Copyright 2007 Sun Microsystems, Inc. All rights reserved
2007-07-03 10:25:12.550 0:0:0>VBSC cmp0 arg is: 00ff00ff.ffffffff
2007-07-03 10:25:13.353 0:0:0>Basic Memory Tests.....
2007-07-03 10:25:12.653 0:0:0>POST enabling threads: 00ff00ff.ffffffff
2007-07-03 10:25:12.766 0:0:0>VBSC mode is: 00000000.00000001
2007-07-03 10:25:13.456 0:0:0>Begin: Branch Sanity Check2007-07-03 10:25:38.399 0:0:0>End :
DRAM Memory BIST
2007-07-03 10:25:13.569 0:0:0>End : Branch Sanity Check2007-07-03 10:25:39.658 0:0:0>L2 Bank
EFuse = 00000000.000000ff 2007-07-03 10:25:39.547 0:0:0>Sys 166 MHz, CPU 1166 MHz, Mem 332
MHz 2007-07-03 10:25:39.760 0:0:0>L2 Bank status = 00000000.00000f0f 2007-07-03 10:25:13.066
0:0:0>VBSC setting verbosity level 32007-07-03 10:25:12.081 0:0:0>@(#)Sun Netra[TM] T5440
POST 4.x.build_119 2007/06/06 09:48
2007-07-03 10:25:12.867 0:0:0>VBSC level is: 00000000.000000012007-07-03 10:25:12.966 0:
0:0>VBSC selecting POST MAX Testing.2007-07-03 10:25:39.864 0:0:0>Core available Efuse =
ffff00ff.ffffffff
2007-07-03 10:25:13.668 0:0:0>Begin: DRAM Memory BIST2007-07-03 10:25:13.793 0:0:
0>................................................................................................
2007-07-03 10:25:13.161 0:0:0> Niagara2, Version 2.12007-07-03 10:25:13.247 0:0:0> Serial
Number: 0fac006b.0e654482
2007-07-03 10:25:39.982 0:0:0>Test Memory.....Enter #. to return to ALOM.
2007-07-03 10:25:40.070 0:0:0>Begin: Probe and Setup Memory2007-07-03 10:29:21.683 0:0:0>INFO:
2007-07-03 10:25:40.181 0:0:0>INFO:
POST Passed all devices.
...2007-07-03 10:29:21.692 0:0:0>POST: Return to VBSC.
 
 
 
 
 
 
 
 
POST Error Message
Example   1-3
7:2>
7:2>ERROR: TEST = Data Bitwalk
7:2>H/W under test = /SYS/MB/CMP0/BR1/CH0/D0
7:2>Repair Instructions: Replace items in order listed by 'H/W
under test' above.
7:2>MSG = Pin 149 failed on /SYS/MB/CMP0/BR1/CH0/D0 (J2001)
7:2>END_ERROR
 
7:2>Decode of Dram Error Log Reg Channel 2 bits
60000000.0000108c
7:2> 1 MEC 62 R/W1C Multiple corrected
errors, one or more CE not logged
38
Sun Netra T5440 Server • September 2015
4096MB at Memory Branch 0 2007-07-03 10:29:21.686 0:0:0>

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