IDT 89HPES64H16G2 User Manual page 98

IDT Link Operation
Notes
PES64H16G2 User Manual
PExRP[0]
PExRP[1]
PES64H16G2
PExRP[2]
PExRP[3]
(a) x4 Port without lane reversal
PExRP[0]
PExRP[1]
PES64H16G2
PExRP[2]
PExRP[3]
(a) x2 Port without lane reversal
PExRP[0]
PExRP[1]
PES64H16G2
PExRP[2]
PExRP[3]
(a) x1 Port without lane reversal
Figure 7.1 Unmerged Port Lane Reversal for Maximum Link Width of x4
PExRP[0]
PExRP[1]
PES64H16G2
PExRP[2]
PExRP[3]
(a) x2 Port without lane reversal
PExRP[0]
PExRP[1]
PES64H16G2
PExRP[2]
PExRP[3]
(c) x1 Port without lane reversal
Figure 7.2 Unmerged Port Lane Reversal for Maximum Link Width of x2
7 - 2
lane 0
lane 1
PES64H16G2
lane 2
lane 3
(b) x4 Port with lane reversal
lane 0
lane 1
PES64H16G2
(b) x2 Port with lane reversal
lane 0
PES64H16G2
(b) x1 Port with lane reversal
lane 0
lane 1 PES64H16G2
(b) x2 Port with lane reversal
lane 0
PES64H16G2
(d) x1 Port with lane reversal
PExRP[0] lane 3
PExRP[1] lane 2
PExRP[2] lane 1
PExRP[3] lane 0
PExRP[0]
PExRP[1]
PExRP[2] lane 1
PExRP[3] lane 0
PExRP[0]
PExRP[1]
PExRP[2]
PExRP[3] lane 0
PExRP[0] lane 1
PExRP[1] lane 0
PExRP[2]
PExRP[3]
PExRP[0]
PExRP[1] lane 0
PExRP[2]
PExRP[3]
April 5, 2013