IDT 89HPES64H16G2 User Manual page 9

IDT
Notes
PES64H16G2 User Manual
August 31, 2011: In Chapter 2, page 2-1, added bullet to explain behavior of an odd numbered port
when it is merged with its even counterpart. In Chapter 6, added text to Downstream Switch Port section. In
Chapter 7, revised text in section Link Width Negotiation in the Presence of Bad Lanes. In Chapter 8,
revised Table 8.1 and text under this table, revised text in section Programmable De-emphasis Adjustment,
added headings to Figures 8.1 through 8.3, and added paragraph after Figure 8.3. In Chapter 14, revised
text in the Introduction section. In Chapter 16, changed type of MAXLNKSPD field in the PCIELCAP
register from RWL to RO, revised Description for MAXGROUP field in MCCAP register, changed lower to
upper in Description for MCBLKALLH and MCBLKUTH registers. In Chapter 17, deleted references to
Failover capability from several registers.
September 9, 2011: In Chapter 8, added additional reference in last paragraph of section Driver Voltage
Level and Amplitude Boost.
February 7, 2012: In Chapter 13, added footnote for RERR and WERR bits in Table 13.15.
February 23, 2012: Added paragraph after Table 13.15 to explain use of DWord addresses.
January 31, 2013: In Figure 13.8, changed No-ack to Ack between DATALM and DATAUM.
April 5, 2013: In Chapter 17, added USSBRDELAY register.
7 April 5, 2013