IDT 89HPES64H16G2 User Manual page 27

Pci express
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IDT PES64H16G2 Device Overview
Notes
PES64H16G2 User Manual
• SerDes optionally turned-off in D3hot
• SerDes associated with unused ports are turned-off
• SerDes associated with unused lanes are placed in a low power state
32 General Purpose I/O
Reliability, Availability and Serviceability (RAS)
– ECRC support
– AER on all ports
– SECDED ECC protection on all internal RAMs
– End-to-end data path parity protection
– Checksum Serial EEPROM content protected
– Autonomous link reliability (preserves system operation in the presence of faulty links)
– Ability to generate an interrupt (INTx or MSI) on link up/down transitions
Test and Debug
– On-chip link activity and status outputs available for Port 0 (upstream port)
– Per port link activity and status outputs available using external I
– SerDes test modes
– Supports IEEE 1149.6 AC JTAG and IEEE 1149.1 JTAG
Power Supplies
– Requires only two power supply voltages (1.0 V and 2.5 V)
– No power sequencing requirements
Packaged in a 35mm x 35mm 1156-ball Flip Chip BGA with 1mm ball spacing
– Compatible with IDT 89HPES64H16 PCIe Gen1 switch
Note: For pin compatibility issues, contact the IDT help desk at ssdhelp@idt.com.
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2
C I/O expander for all other ports
April 5, 2013

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