IDT 89HPES64H16G2 User Manual page 236

IDT PCI to PCI Bridge and Proprietary Port Specific Registers
Bit Field
Field Name
9:7 TM
10 EMC
11 CSOS
12 CDE
15:13 Reserved
PES64H16G2 User Manual
Default
Type
Value
RW 0x0 Transmit Margin. This field controls the value of the non de-
Sticky emphasized voltage level at the transmitter pins. This field is reset
to 0x0 on entry to the LTSSM Polling.Configuration substate.
0x0 - Normal operating range
0x1 - 900 mV for full swing and 500 mV for low-swing
0x2 - 700 mV for full swing and 400 mV for low-swing
0x3 - 500 mV for full swing and 300 mV for low-swing
0x4 - 300 mV for full swing and 200 mv for low-swing
0x5 - 200 mV for full swing and 100 mv for low-swing
0x6 - 0x7 - Reserved
This register is intended for debug, compliance testing purpose
only. System firmware and software is allowed to modify this regis-
ter only during debug or compliance testing. In all other cases, the
system must ensure that this register is set to the default value.
When this field is set to "Normal Operating Range", the SerDes
transmitter drive level is selected via the SerDes Transmitter Con-
trol registers (S[x]TXLCTL0 and S[x]TXLCTL1). Refer to section
SerDes Transmitter Controls on page 8-1.
When this field is modified, the newly selected value is not applied
until the PHY LTSSM transitions through the states in which it is
allowed to modify the transmit margin setting on the line (i.e.,
Recovery.RcvrLock). Therefore, after modifying this field, it is rec-
ommended that the link be retrained by setting the LRET bit in the
PCIELCTL register.
RW 0x0 Enter Modified Compliance. When this bit is set to 1b, the port
Sticky transmits the modified compliance pattern if the LTSSM enters
Polling.Compliance state.
This register is intended for debug, compliance testing purposes
only. System firmware and software is allowed to modify this regis-
ter only during debug or compliance testing. In all other cases, the
system must ensure that this register is set to the default value.
RW 0x0 Compliance SOS. When set to 1b, the LTSSM is required to send
Sticky SOS periodically in between the compliance and modified compli-
ance patterns.
RW 0x0 Compliance De-emphasis. This bit selects the de-emphasis
Sticky value in the Polling.Compliance state when this state was entered
as a result of setting the Enter Compliance (ECOMP) bit in this reg-
ister.
0x0 - De-emphasis level = -6.0 dB
0x1 - De-emphasis level = -3.5 dB
This bit is intended for debug, compliance testing purposes. Sys-
tem firmware and software is allowed to modify this bit only during
debug or compliance testing.
RO 0x0 Reserved field.
16 - 26
Description
April 5, 2013