IDT 89HPES64H16G2 User Manual page 217

IDT PCI to PCI Bridge and Proprietary Port Specific Registers
MBASE - Memory Base Register (0x020)
Bit
Field
3:0
15:4
MLIMIT - Memory Limit Register (0x022)
Bit
Field
3:0
15:4
PMBASE - Prefetchable Memory Base Register (0x024)
Bit
Field
0
3:1
15:4
PMLIMIT - Prefetchable Memory Limit Register (0x026)
Bit
Field
0
PES64H16G2 User Manual
Field Default
Type
Name Value
Reserved RO 0x0
MBASE RW 0xFFF
Field Default
Type
Name Value
Reserved RO 0x0
MLIMIT RW 0x0
Field Default
Type
Name Value
PMCAP RWL 0x1
Reserved RO 0x0
PMBASE RW 0xFFF
Field Default
Type
Name Value
PMCAP RO 0x1
Description
Reserved field.
Memory Address Base. The MBASE and MLIMIT registers are
used to control the forwarding of non-prefetchable transactions
between the primary and secondary interfaces of the bridge. This
field contains A[31:20] of the lowest address aligned on a 1MB
boundary that is below the primary interface of the bridge
Description
Reserved field.
Memory Address Limit. The MBASE and MLIMIT registers are
used to control the forwarding of non-prefetchable transactions
between the primary and secondary interfaces of the bridge. This
field contains A[31:20] of the highest address, with A[19:0]
assumed to be 0xF_FFFF, that is below the primary interface of
the bridge.
Description
Prefetchable Memory Capability. Indicates if the bridge supports
32-bit or 64-bit prefetchable memory addressing.
0x0 - (prefmem32) 32-bit prefetchable memory addressing.
0x1 - (prefmem64) 64-bit prefetchable memory addressing.
Reserved field.
Prefetchable Memory Address Base. The PMBASE, PMBASEU,
PMLIMIT and PMLIMITU registers are used to control the forward-
ing of prefetchable transactions between the primary and second-
ary interfaces of the bridge. This field contains A[31:20] of the
lowest memory address aligned on a 1MB boundary that is below
the primary interface of the bridge. PMBASEU specifies the
remaining bits.
Description
Prefetchable Memory Capability. Indicates if the bridge supports
32-bit or 64-bit prefetchable memory addressing. This bit always
reflects the value in the PMCAP field in the PMBASE register.
16 - 7 April 5, 2013