IDT 89HPES64H16G2 User Manual page 15

IDT Table of Contents
Notes
PES64H16G2 User Manual
PCI to PCI Bridge and Proprietary Port Specific Registers
Type 1 Configuration Header Registers ....................................................................................... 16-1
PCI Express Capability Structure ............................................................................................... 16-11
Power Management Capability Structure ................................................................................... 16-27
Message Signaled Interrupt Capability Structure ....................................................................... 16-29
Subsystem ID and Subsystem Vendor ID .................................................................................. 16-31
Extended Configuration Space Access Registers ...................................................................... 16-31
Advanced Error Reporting (AER) Enhanced Capability.............................................................. 16-32
Device Serial Number Enhanced Capability............................................................................... 16-41
PCI Express Virtual Channel Capability ..................................................................................... 16-42
Power Budgeting Enhanced Capability ...................................................................................... 16-47
ACS Extended Capability ........................................................................................................... 16-49
Multicast Extended Capability..................................................................................................... 16-52
Proprietary Port Specific Registers............................................................................................. 16-57
Port Control and Status Registers ...................................................................................... 16-57
Internal Error Control and Status Registers........................................................................ 16-59
Physical Layer Control and Status Registers ..................................................................... 16-67
Power Management Control and Status Registers ............................................................ 16-70
Request Metering ............................................................................................................... 16-70
Global Address Space Access Registers ........................................................................... 16-72
Switch Configuration and Status Registers
Switch Control and Status Registers ............................................................................................ 17-1
Internal Switch Timer .................................................................................................................... 17-3
Switch Partition and Port Registers .............................................................................................. 17-4
Protection...................................................................................................................................... 17-7
SerDes Control and Status Registers........................................................................................... 17-7
General Purpose I/O Registers................................................................................................... 17-15
Hot-Plug and SMBus Interface Registers ................................................................................... 17-19
JTAG Boundary Scan
Introduction ................................................................................................................................... 18-1
Test Access Point ......................................................................................................................... 18-1
Signal Definitions .......................................................................................................................... 18-1
Boundary Scan Chain................................................................................................................... 18-3
Test Data Register (DR) ............................................................................................................... 18-5
Boundary Scan Registers..................................................................................................... 18-6
Instruction Register (IR)................................................................................................................ 18-7
EXTEST................................................................................................................................ 18-8
SAMPLE/PRELOAD............................................................................................................. 18-8
BYPASS ............................................................................................................................... 18-8
CLAMP ................................................................................................................................. 18-9
IDCODE................................................................................................................................ 18-9
VALIDATE ............................................................................................................................ 18-9
EXTEST_TRAIN................................................................................................................... 18-9
EXTEST_PULSE................................................................................................................ 18-10
RESERVED........................................................................................................................ 18-10
Usage Considerations ........................................................................................................ 18-10
v April 5, 2013