IDT 89HPES64H16G2 User Manual page 13

IDT Table of Contents
Notes
PES64H16G2 User Manual
L0s ASPM............................................................................................................................. 7-12
L1 ASPM .............................................................................................................................. 7-12
L1 ASPM Entry Rejection Timer ................................................................................................... 7-13
Link Status .................................................................................................................................... 7-14
De-emphasis Negotiation ............................................................................................................. 7-14
Crosslink ....................................................................................................................................... 7-15
Hot Reset Operation on a Crosslink .................................................................................... 7-16
Link Disable Operation on a Crosslink ................................................................................. 7-16
Gen1 Compatibility Mode ............................................................................................................. 7-16
SerDes
Introduction ..................................................................................................................................... 8-1
SerDes Numbering and Port Association ....................................................................................... 8-1
SerDes Transmitter Controls .......................................................................................................... 8-1
Driver Voltage Level and Amplitude Boost ............................................................................. 8-1
De-emphasis .......................................................................................................................... 8-2
Slew Rate ............................................................................................................................... 8-2
PCI Express Low-Swing Mode ............................................................................................... 8-2
Receiver Equalization ..................................................................................................................... 8-3
Programming of SerDes Controls................................................................................................... 8-3
Programmable Voltage Margining and De-Emphasis..................................................................... 8-3
SerDes Transmitter Control Registers.................................................................................... 8-4
Transmit Margining using the PCI Express Link Control 2 Register............................................. 8-12
Low-Swing Transmitter Voltage Mode.......................................................................................... 8-13
Receiver Equalization Controls..................................................................................................... 8-14
SerDes Power Management......................................................................................................... 8-15
Theory of Operation
Introduction ..................................................................................................................................... 9-1
Transaction Routing........................................................................................................................ 9-1
Interrupts......................................................................................................................................... 9-1
Downstream Port Interrupts.................................................................................................... 9-2
Legacy Interrupt Emulation..................................................................................................... 9-2
Access Control Services................................................................................................................. 9-3
Error Detection and Handling ......................................................................................................... 9-6
Physical Layer Errors ............................................................................................................. 9-7
Data Link Layer Errors............................................................................................................ 9-7
Transaction Layer Errors ........................................................................................................ 9-8
Routing Errors ...................................................................................................................... 9-16
Bus Locking .................................................................................................................................. 9-17
Hot-Plug and Hot-Swap
Introduction ................................................................................................................................... 10-1
Hot-Plug Signals ........................................................................................................................... 10-3
Port Reset Outputs ....................................................................................................................... 10-5
Power Enable Controlled Reset Output................................................................................ 10-5
Power Good Controlled Reset Output .................................................................................. 10-6
Hot-Plug Events............................................................................................................................ 10-6
Legacy System Hot-Plug Support................................................................................................. 10-7
Hot-Swap ...................................................................................................................................... 10-8
iii April 5, 2013