IDT 89HPES64H16G2 User Manual page 100

IDT Link Operation
Notes
PES64H16G2 User Manual
PExRP[0]
PExRP[1]
PExRP[2]
PExRP[3]
PES64H16G2
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
(a) x4 Port without lane reversal
PExRP[0]
PExRP[1]
PExRP[2]
PExRP[3]
PES64H16G2
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
(c) x2 Port without lane reversal
PExRP[0]
PExRP[1]
PExRP[2]
PExRP[3]
PES64H16G2
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
(e) x1 Port without lane reversal
Figure 7.4 Merged Port Lane Reversal for Maximum Link Width of x4
7 - 4
lane 0
lane 1
lane 2
lane 3
PES64H16G2
(b) x4 Port with lane reversal
lane 0
lane 1
PES64H16G2
(d) x2 Port with lane reversal
lane 0
PES64H16G2
(f) x1 Port with lane reversal
PExRP[0] lane 3
PExRP[1] lane 2
PExRP[2] lane 1
PExRP[3] lane 0
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
PExRP[0]
PExRP[1]
PExRP[2] lane 1
PExRP[3] lane 0
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
PExRP[0]
PExRP[1]
PExRP[2]
PExRP[3] lane 0
PExRP[4]
PExRP[5]
PExRP[6]
PExRP[7]
April 5, 2013