Printhead Control - Epson DFX-9000 Service Manual

Epson DFX-9000
Printhead Control Circuit
The following shows a block diagram of the printhead control circuit.
ROM Board
SoC ASIC
HDIRQ D0-15 A1-9
ASIC
Printhead
Control
FB_01-36
Section
PD01
PD02
PD36
Safety Check
Control
Section
Figure 2-33. Printhead Control Block Diagram
Operating Principles
Power Unit
Printhead
+42V
Flyback
absorption
circuit
Safety
FR1
Check
Detection
Section
FR2
FR9
GND

Printhead control

The printhead control circuitry includes the print data extraction section,
main excitation / flyback time selection section, print trigger generation
section, and the print timing control section. The timing control of the
printhead pins are based on:
1. The print data and density sent from the SoC ASIC, and
2. The 42 V voltage and CR encoder pulse input sent to the Mechanism
Control ASIC.
DIN00-15
Main Excitation/
42 V Voltage
Time Selection
CR Linear
Encoder_A
CR Linear
Encoder_B
Figure 2-34. Printhead Control Block Diagram
Circuit operation
PD01-09 Print Data
Print Data Print Timing
Extraction Control
PD11-19 Print Data
Section Section
PD21-29 Print Data
PD31-39 Print Data
8BIT Main Excitation
Time for Front Head
8BIT Main Excitation
Time for Rear Head
Flyback
8BIT FB Time
Section
for Front Head
8BIT FB Time
for Rear Head
PRN_DIR
Print Trigger
Print Trigger
Generation
Section
DPISEL11-0
Revision B
PD01-09
PD11-19
PD21-29
PD31-39
FB01-09
FB11-19
FB21-29
FB31-39
HD_IRQ
87