Product Description; Op Board - Epson DFX-9000 Service Manual

Epson DFX-9000
The offset time is the sum of the following four offset values.
Offset time = Speed offset + FR offset + constant offset + flight time
offset
Speed offset
Offset value to correct for CR speed differences.
Front/Rear (FR) offset
Offset value to correct for the flight time difference between the
front head and rear head.
Constant offset
Offset value to correct for the difference between the pin pitch and
print density.
Flight time offset
Offset value to correct for the individual flight time for each pin.
In addition, a parallel timer is used to reduce the conducting time to even
out the impact of one pin when that pin is used repeatedly in a job. If an
operation of the pin is detected in the previous print cycle, the "parallel
enable" and the mask signal are activated to reduce the main excitation
time. The Mechanism Control ASIC then outputs a main excitation
control signal (MAINF_xx) and flyback signal (FLYBK_xx) to activate
the transistor to control the printhead.
Head abnormal current detection circuit
When an abnormal current exceeding the prescribed level is detected,
the status is sent to the Mechanism Control ASIC. If the Mechanism
Control ASIC internal circuit detects that the status has continued for a
certain period of time, the 42 V/37 V line for the ROM board is cut off
by turning the X42VPST signal off (low). The firmware recognizes this
state when it performs a Read operation on the Mechanism Control
ASIC internal register.
Operating Principles

2.3.2 OP board

The LCD, LED and operation buttons are mounted on the OP (Operator
Panel) board. They are controlled by a dedicated LSI device. The OP
Panel Control LSI and communicates with the Mechanism Control
ASIC on the ROM Board by serial data transmission.
OP Board
LCD display
Buzzer
ROM Board
Figure 2-37. OP Board control block diagram
Circuit operation
LED display Switch operation
section section section
OP Panel Control
LSI
ASIC
Revision B
89